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1

An Efficient GPU Cache Architecture for Applications with Irregular Memory Access Patterns

Li, Bingchao, Wei, Jizeng, Sun, Jizhou, Annavaram, Murali, Kim, Nam Sung

Journal:

ACM Transactions on Architecture and Code Optimization

Year:

2019

Language:

english

File:

PDF, 1.91 MB

english, 2019

2

[IEEE 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) - Seoul, Korea (South) (2011.08.7-2011.08.10)] 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) - A multi-functional dot product unit with SIMD architecture for embedded 3D graphics engine

Chang, Yisong, Wei, Jizeng, Guo, Wei, Sun, Jizhou

Year:

2011

Language:

english

File:

PDF, 946 KB

english, 2011

3

Novel microRNAs uncovered by deep sequencing of small RNA transcriptomes in bread wheat (Triticum aestivumL.) andBrachypodium distachyon(L.) Beauv

Bo Wei, Tao Cai, Rongzhi Zhang, Aili Li, Naxin Huo, Shan Li, Yong Q. Gu, John Vogel, Jizeng Jia, Yijun Qi, Long Mao

Journal:

Functional & Integrative Genomics

Year:

2009

Language:

english

File:

PDF, 784 KB

english, 2009

4

A intervarietal genetic map and QTL analysis for yield traits in wheat

Sishen Li, Jizeng Jia, Xianyun Wei, Xiaocun Zhang, Linzhi Li, Haimei Chen, Yuding Fan, Haiyan Sun, Xinhua Zhao, Tiandong Lei, Yunfong Xu, Fangshan Jiang, Honggang Wang, Lihui Li

Journal:

Molecular Breeding

Year:

2007

Language:

english

File:

PDF, 391 KB

english, 2007

5

Dreb1genes in wheat (Triticum aestivumL.): development of functional markers and gene mapping based on SNPs

Bo Wei, Ruilian Jing, Chengshe Wang, Jibao Chen, Xinguo Mao, Xiaoping Chang, Jizeng Jia

Journal:

Molecular Breeding

Year:

2009

Language:

english

File:

PDF, 1.00 MB

english, 2009

6

Comparison of single-plane and biplane area-length methods for right ventricular volume calculation: In vivo and vitro study

Ruiqin Xie, Wei Cui, Yuyin Guo, Jizeng Zhang, Yuming Hao

Journal:

International Journal of Cardiology

Year:

2012

Language:

english

File:

PDF, 139 KB

english, 2012

7

[IEEE 2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming (PAAP) - Tianjin, China (2011.12.9-2011.12.11)] 2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming - A Novel Architecture for Fast RSA Key Generation Based on RNS

Hu, Jingwei, Guo, Wei, Wei, Jizeng, Chang, Yisong, Sun, Dazhi

Year:

2011

Language:

english

File:

PDF, 1.62 MB

english, 2011

8

Hardware architecture for RSA cryptography based on residue number system

Wei Guo 郭炜, Yaling Liu 刘亚灵, Songhui Bai 白松辉, Jizeng Wei 魏继增, Dazhi Sun 孙达志

Journal:

Transactions of Tianjin University

Year:

2012

Language:

english

File:

PDF, 511 KB

english, 2012

9

A high performance, area efficient TTA-like vertex shader architecture with optimized floating point arithmetic unit for embedded graphics applications

Chang, Yisong, Wei, Jizeng, Guo, Wei, Sun, Jizhou

Journal:

Microprocessors and Microsystems

Year:

2013

Language:

english

File:

PDF, 2.73 MB

english, 2013

10

[IEEE 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip (VLSI-SoC) - Kowloon, Hong Kong (2011.10.3-2011.10.5)] 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip - An optimized TTA-like vertex shader datapath for embedded 3D graphics processing unit

Jizeng Wei,, Yisong Chang,, Wei Guo,, Jizhou Sun,

Year:

2011

Language:

english

File:

PDF, 1008 KB

english, 2011

11

[IEEE 2008 International Conference on Embedded Software and Systems Symposia (ICESS Symposia) - Chengdu, SiChuan, China (2008.07.29-2008.07.31)] 2008 International Conference on Embedded Software and Systems Symposia - Program Compression Based on Arithmetic Coding on Transport Triggered Architecture

Wei, Jizeng, Guo, Wei, Sun, Jizhou, Yao, Yongbin

Year:

2008

Language:

english

File:

PDF, 316 KB

english, 2008

12

[IEEE 2010 International Conference on Computer Design and Applications (ICCDA 2010) - Qinhuangdao, China (2010.06.25-2010.06.27)] 2010 International Conference On Computer Design and Applications - Transaction level modeling tradeoff on accuracy and speed: A case study

Jiao Su,, Wei Guo,, Jizeng Wei,, Shaofei Shi,, Bin Jiang,

Year:

2010

Language:

english

File:

PDF, 701 KB

english, 2010

13

[IEEE APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) - Macao, China (2008.11.30-2008.12.3)] APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - Design and implementation of co-design toolset for tcore processor

Jizeng Wei,, Wei Guo,, Jizhou Sun,, Zaifeng Shi,

Year:

2008

Language:

english

File:

PDF, 741 KB

english, 2008

14

[IEEE 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) - Seoul, Korea (South) (2011.08.7-2011.08.10)] 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) - An optimized hardware design for stereoscopic image generation based on depth image

Liu, Bing, Wei, Jizeng, Shi, Shaofei, Chang, Yisong, Guo, Wei

Year:

2011

Language:

english

File:

PDF, 1022 KB

english, 2011

15

[IEEE 2011 IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom) - Changsha, China (2011.11.16-2011.11.18)] 2011IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications - An Efficient Stereoscopic Game Conversion System for Embedded Platform

Liu, Hao, Guo, Wei, Lu, Chao, Wei, Jizeng

Year:

2011

Language:

english

File:

PDF, 1.01 MB

english, 2011

16

Fast and Generic Inversion Architectures Over $\mbox{GF}(2^m)$ Using Modified Itoh–Tsujii Algorithms

Hu, Jingwei, Guo, Wei, Wei, Jizeng, Cheung, Ray C. C.

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2015

Language:

english

File:

PDF, 304 KB

english, 2015

17

[IEEE 2015 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) - Philadelphia, PA, USA (2015.3.29-2015.3.31)] 2015 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) - Analyzing graphics processor unit (GPU) instruction set architectures

Mayank, Kothiya, Dai, Hongwen, Wei, Jizeng, Zhou, Huiyang

Year:

2015

Language:

english

File:

PDF, 545 KB

english, 2015

18

[IEEE 2014 IEEE 13th International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom) - Beijing, China (2014.9.24-2014.9.26)] 2014 IEEE 13th International Conference on Trust, Security and Privacy in Computing and Communications - The Micro-architectural Support Countermeasures against the Branch Prediction Analysis Attack

Tan, Ya, Wei, Jizeng, Guo, Wei

Year:

2014

Language:

english

File:

PDF, 204 KB

english, 2014

19

An Area-Efficient Unified Architecture for Multi-Functional Double-Precision Floating-Point Computation

Guo, Wei, Ri, KwangHyok, Cui, Luping, Wei, Jizeng

Journal:

Journal of Circuits System and Computers

Year:

2015

Language:

english

File:

PDF, 946 KB

english, 2015

20

[IEEE 2010 International Conference on Computer Design and Applications (ICCDA 2010) - Qinhuangdao, China (2010.06.25-2010.06.27)] 2010 International Conference On Computer Design and Applications - Instruction scheduling using genetic algorithm with taboo search for TTA-like processors

Songyan Zhong,, Jizeng Wei,, Wei Guo,, Zhenghua Wang,

Year:

2010

Language:

english

File:

PDF, 1.17 MB

english, 2010

21

[IEEE 2009 WRI World Congress on Computer Science and Information Engineering - Los Angeles, California USA (2009.03.31-2009.04.2)] 2009 WRI World Congress on Computer Science and Information Engineering - Design of a Configurable and Extensible Tcore Processor Based on Transport Triggered Architecture

Guo, Wei, Wei, Jizeng, Yao, Yongbin, Shi, Zaifeng, Wang, Su

Year:

2009

Language:

english

File:

PDF, 378 KB

english, 2009

22

[IEEE Fifth World Congress on Intelligent Control and Automation (IEEE Cat. No.04EX788) - Hangzhou, China (June 15-19, 2004)] Fifth World Congress on Intelligent Control and Automation (IEEE Cat. No.04EX788) - Multi-rate output feedback control of nonlinear systems

Ge Guo,, Jizeng Wang,, Jigong Li,, Yiwei Feng,, Wei Fan,

Year:

2004

Language:

english

File:

PDF, 214 KB

english, 2004

23

Improving SIMD Utilization with Thread-Lane Shuﬄed Compaction in GPGPU

Li, Bingchao, Sun, Jizhou, Wei, Jizeng, Guo, Wei

Journal:

Chinese Journal of Electronics

Year:

2015

Language:

english

File:

PDF, 445 KB

english, 2015

24

A low-time-complexity and secure dual-field scalar multiplication based on co-Z protected NAF

Wei, Jizeng, Liu, Xulong, Liu, Hao, Guo, Wei

Journal:

IEICE Electronics Express

Year:

2014

Language:

english

File:

PDF, 990 KB

english, 2014

25

A modified post-TnL vertex cache for the multi-shader embedded GPUs

Wei, Jizeng, Chang, Yisong, Li, Bingchao, Guo, Wei, Sun, Jizhou

Journal:

IEICE Electronics Express

Year:

2015

Language:

english

File:

PDF, 3.22 MB

english, 2015

26

Design optimization for capacitive-resistively driven on-chip global interconnect

Jiang, Jianfei, He, Weifeng, Wei, Jizeng, Wang, Qin, Mao, Zhigang

Journal:

IEICE Electronics Express

Year:

2015

Language:

english

File:

PDF, 2.71 MB

english, 2015

27

Exploring new features of high-bandwidth memory for GPUs

Li, Bingchao, Song, Choungki, Wei, Jizeng, Ahn, Jung Ho, Kim, Nam Sung

Journal:

IEICE Electronics Express

Year:

2016

Language:

english

File:

PDF, 1.25 MB

english, 2016

28

A scalable RNS Montgomery multiplier over F2m

Hu, Jingwei, Guo, Wei, Wei, Jizeng, Cheung, Ray C.C.

Journal:

IEICE Electronics Express

Year:

2013

Language:

english

File:

PDF, 458 KB

english, 2013

29

[IEEE 2016 IEEE Trustcom/BigDataSE/ISPA - Tianjin, China (2016.8.23-2016.8.26)] 2016 IEEE Trustcom/BigDataSE/ISPA - SecPage - A Lightweight Memory Protection Architecture

Liang, Kaiyuan, Feng, Yanzhao, Wei, Jizeng, Guo, Wei

Year:

2016

Language:

english

File:

PDF, 283 KB

english, 2016

30

[IEEE 2016 IEEE Trustcom/BigDataSE/ISPA - Tianjin, China (2016.8.23-2016.8.26)] 2016 IEEE Trustcom/BigDataSE/ISPA - Dual Processing Engine Architecture to Speed Up Optimal Ate Pairing on FPGA Platform

Hao, Zhongyuan, Guo, Wei, Wei, Jizeng, Sun, Dazhi

Year:

2016

Language:

english

File:

PDF, 293 KB

english, 2016

31

Effect of Mg/Al ratios on hydration mechanism of tabular alumina carbon composites reinforced by Al4C3 in situ reaction

Yang, Yifan, Jiang, Mingxue, Yang, Ding’ao, Yuan, Shouqian, Zhao, Jizeng, Zhao, Wei, Yang, Mengyao

Journal:

Journal of Wuhan University of Technology-Mater. Sci. Ed.

Year:

2017

Language:

english

File:

PDF, 928 KB

english, 2017

32

An efficient control flow validation method using redundant computing capacity of dual-processor architecture

Wang, Qingran, Guo, Wei, Wei, Jizeng, Wang, Hua

Journal:

Year:

2018

Language:

english

File:

PDF, 853 KB

english, 2018

33

Highly-parallel hardware implementation of optimal ate pairing over Barreto-Naehrig curves

Wang, A. Tengfei, Guo, B. Wei, Wei, C. Jizeng

Journal:

Integration, the VLSI Journal

Year:

2018

Language:

english

File:

PDF, 670 KB

english, 2018

34

Bioinspired Shear Flow-Driven Layer-by-Layer in situ Self-Assembly

He, Chuanjiang, Ye, Tingting, Teng, Wenqi, Fang, Zhi, Ruan, Wei-Shuyi, Liu, Guowu, Chen, Hui, Sun, Jizeng, Hui, Lanlan, Sheng, Feng, Pan, Dingyi, Yang, Chunming, Zheng, Yi Steve, Luo, Meng-Bo, Yao, Ke

Journal:

Year:

2019

File:

PDF, 1.67 MB

2019

35

Bioinspired Shear Flow-Driven Layer-by-Layer in situ Self-Assembly

He, Chuanjiang, Ye, Tingting, Teng, Wenqi, Fang, Zhi, Ruan, Wei-Shuyi, Liu, Guowu, Chen, Hui, Sun, Jizeng, Hui, Lanlan, Sheng, Feng, Pan, Dingyi, Yang, Chunming, Zheng, Yi Steve, Luo, Meng-Bo, Yao, Ke

Journal:

Year:

2019

Language:

english

File:

PDF, 1.67 MB

english, 2019

36

Correction to Bioinspired Shear-Flow-Driven Layer-by-Layer in Situ Self-Assembly

He, Chuanjiang, Ye, Tingting, Teng, Wenqi, Fang, Zhi, Ruan, Wei-Shuyi, Liu, Guowu, Chen, Hui, Sun, Jizeng, Hui, Lanlan, Sheng, Feng, Pan, Dingyi, Yang, Chunming, Zheng, Yi, Luo, Meng-Bo, Yao, Ke, Wang

Journal:

Year:

2019

Language:

english

File:

PDF, 205 KB

english, 2019

37

Mechanical Model for Catch-Bond-Mediated Cell Adhesion in Shear Flow

Li, Long, Kang, Wei, Wang, Jizeng

Journal:

International Journal of Molecular Sciences

Year:

2020

File:

PDF, 2.87 MB

2020

38

A Real-Time Naive Bayes Classifier Accelerator on FPGA

Xue, Zhen, Wei, Jizeng, Guo, Wei

Journal:

Year:

2020

Language:

english

File:

PDF, 3.17 MB

english, 2020

39

[IEEE 2019 IEEE 25th International Conference on Parallel and Distributed Systems (ICPADS) - Tianjin, China (2019.12.4-2019.12.6)] 2019 IEEE 25th International Conference on Parallel and Distributed Systems (ICPADS) - A Systematic Approach to Horizontal Clustering Analysis on Embedded RSA Implementation

Shi, Fanyu, Wei, Jizeng, Sun, Dazhi, Wei, Guo

Year:

2019

Language:

english

File:

PDF, 688 KB

english, 2019

40

Kinetics and Mechanism of Oxidation Induced Contraction of MgAl2O4 Spinel Carbon Composites Reinforced by Al4C3in situ Reaction

Yang, Mengyao, Xiao, Guoqing, Yang, Dingâao, Yuan, Shouqian, Zhao, Jizeng, Zhao, Wei, Gao, Song

Journal:

Journal of Wuhan University of Technology-Mater. Sci. Ed.

Year:

2020

File:

PDF, 1.02 MB

2020

41

A method for evaluating the longitudinal functional connectivity of a riverâlakeâmarsh system and its application in China

Liu, Yeling, Cui, Baoshan, Du, Jizeng, Wang, Qing, Yu, Shuling, Yang, Wei

Journal:

Hydrological Processes

Year:

2020

File:

PDF, 6.68 MB

2020

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